1. Field of the Invention
This invention relates to a liquid crystal display and a driving method thereof, and more particularly to a liquid crystal display and a driving method thereof for improving a picture quality.
2. Description of the Related Art
Generally, an active matrix liquid crystal display device controls the light transmissivity of liquid crystal by the electric field applied to the liquid crystal, for displaying a picture. For this, the liquid crystal display device, as shown in FIG. 1, includes a liquid crystal display panel 2 in which a plurality of liquid crystal cells are arranged in a matrix between two transparent substrates, a gate driver 6 connected to a plurality of gate lines (GL1 to GLm) of the liquid crystal display panel 2, and a data driver 4 connected to a plurality of data lines (DL1 to DLn) of the liquid crystal display panel 2.
The gate driver 6 sequentially supplies scanning signals to m gate lines (GL1 to GLm) and drives a thin film transistor TFT connected to the corresponding gate lines (GL1 to GLm). The data driver 4 is synchronized with the scanning signals being sequentially supplied to the gate lines (GL1 to GLm) and supplies the data corresponding to a brightness value of video data to the data lines (Dl1 to DLn). In other words, the conventional liquid crystal display sequentially turns on/off for a frame period the whole gate lines (GL1 to GLm) formed in the liquid crystal panel 2 and supplies to the data lines (DL1 to DLn) the corresponding data to the gate lines (GL1 to GLm) for displaying the picture.
FIG. 2 is a diagram representing in detail a conventional gate driver.
Referring to FIG. 2, the conventional gate driver 6 includes a shift register 8 for receiving scan data from a supplier 14 and for shifting the supplied scan data, a level shifter 10 for receiving the scan data from the shift register 8 and for shifting a voltage level suitable for driving the liquid crystal display panel 2, and an outputter for receiving data from the level shifter 10 and for supplying to the liquid crystal display panel 2.
The supplier 14 supplies the scan data corresponding to ‘1’ to a first bit of the shift register 8. The shift register 8 supplies the scan data corresponding to ‘1’ supplied to a first bit in response to a clock signal (XGA, for example) (not shown), to a first bit of the level shifter 10 and a second bit of itself. The supplier 14 does not supply to the shift register 8 the scan data corresponding to ‘1’ until the scan data corresponding to ‘1’ is shifted to a mth bit of the shift register 8. In other words, there is only one scan data corresponding to ‘1’ in the shift register 8.
Meanwhile, the shift register 8 sequentially moves to the m bit the scan data of ‘1’ supplied to the first bit of itself, and supplies the scan data to each bit of the level shifter 10. When the scan data of ‘1’ is supplied from the shift register 8, the level shifter 10 outputs a gate high volt (Ghv) to the outputter 12 by shifting the voltage level (around 20V). Also, when the scan data of ‘0’ is supplied from the shift register 8, the level shifter 10 outputs a gate low volt (Glv) to the outputter 12 by shifting the voltage level (around −5V).
The outputter 12 supplies the scan data applied from the level shifter 10 to the liquid crystal display panel 2. If the scan data of ‘1’ is currently supplied to a m−10th gate line (GLm-10), the liquid crystal display panel 2 is divided into the picture of a current frame 16 and the picture of a previous frame 18 on the basis of the m-10th gate line (GLm-10) as shown in FIG. 3.
Accordingly, if a moving picture which moves from right to left, is displayed in the liquid crystal display panel 2, the moving picture 20 displayed in the current frame 16 and the moving picture (22) displayed in the previous frame 18 appear to be crossing each other on the basis of the m-10th gate line (GLm-10) as shown in FIG. 4A. At this moment, the picture of the current frame and the picture of the previous frame overlap each other as much as the part 24 by which the moving picture 20 displayed in the current frame 16 moves, as shown in FIG. 4B. Thereby, a motion blur phenomenon occurs, resulting in the deterioration of the picture quality of the liquid crystal display panel 2.
In the meantime, a plurality of pixels on the liquid crystal panel 2 can be represented as an equivalent circuit shown in FIG. 5. In FIG. 5, a pixel includes a TFT connected with a gate line (GL), a data line (DL) and a common voltage line (CL), and a liquid crystal cell (Clc) connected with a drain terminal of the TFT and the reference voltage line (CL). Also, the pixel includes a parasitic capacitor (Cgs) formed between the drain terminal of the TFT and the gate line (GL), and a storage capacitor (Cst) between the parasitic capacitor (Cgs) and a ground voltage source (GND).
A data pulse is supplied to the data line (DL) when the gate high volt (Ghv) is supplied to the gate line (GL) of the liquid crystal display panel 2 as shown in FIG. 6. The voltage of the data pulse drops as much as the changed voltage (ΔVp) when the gate high volt (Ghv) is changed to a low state. As a result, the deterioration of the brightness of the liquid crystal display panel 2, that is, the deterioration of the picture quality of the liquid crystal display panel 2, occurs. The voltage drop amount (ΔVp) of the data pulse is determined by the following equation 1.ΔVP=Cgs/Cgs+Cst+Clc(Vgh−Vgl.)  EQUATION 1(wherein Clc is a capacitor of a liquid crystal cell, Vgh represents a voltage value of a gate high volt and Vgl represents a voltage value of a gate low volt.)
In the equation 1, a parasitic capacitor (Cgs), a storage capacitor (Cst), a voltage value of the gate high volt and a voltage value of the gate low volt are fixed, and the capacitor value of the liquid crystal cell (Clc) is determined by the picture displayed. If a still picture is displayed in the liquid crystal display panel 2, the capacitor value of the liquid crystal cell (Clc) can be predicted in advance. Accordingly, the voltage drop amount (ΔVp) of the data pulse can also be predicted so that the voltage drop amount (ΔVp) of the data pulse can be compensated.
However, if the moving picture is displayed in the liquid crystal display panel 2, the capacitor value of the liquid crystal cell (Clc) cannot be predicted in advance. Accordingly, the voltage drop amount (ΔVp) of the data pulse cannot be predicted. Accordingly, the voltage drop amount (ΔVp) of the data pulse is not compensated, thus the picture quality of the liquid crystal display panel 2 is deteriorated.